Showing posts with label memory blocks. Show all posts
Showing posts with label memory blocks. Show all posts

Thursday, 10 March 2011

Initializing M4K blocks for RAM. (For Altera FPGA users)

Hello Everybody.

It seems you are having problem about how to initialize on-board memory using Megafunction Library and M4K blocks. (I am using Quartus II 10.1 SP1, but procees will be similar all other versions)

So here are the steps of the solution:

Start Quartus II and open new project.

 Open the MegaFunction Wizard

Select the 'Create New megaFunction' Option
Select the Memory Compiler from list

Select RAM 1 Port and give name to output file

After clicking Next, select the no. of bits per block (In this case its 4 bits)

Select no. of words or blocks of 4-bits you want (In this case 32 blocks, I use 'blocks' though 'words' is proper term)

Select the memory block type as M4K (It doesnt matter if you keep that Auto)

Click Next. Dont change anything on this page

Now select the second option if you want to enter data in memory before programming

To create hex file keep the MegaFunction window as it is and click on the File>New>Intel-hex File in Quartus II window

Then make the proper changes in words and wordsize field

Add whatever data you want in the respective blocks (It will only take a 4 bit no. as we have set the word size as 4)

Save the file be any relevant name you want and then open the MegaFunction window and select the file

Click Next till you get the this window and select the Instantiation file option

Click finish and then open the Instantiation and Component file from File>Open>(Your destination of project)>*_inst.vhd and *.cmp


Then add the Code as follows and make necessary changes to the Port Map field as per your project specifications






If you want to, then you can follow the process rather can use the process with my SRAM interface example project. It will make you more perfect. You can check necessary changes required for my project in .vhd file I attached. Mail me your querries or suggestions on prasadp4009@gmail.com

Enjoy programming...!!

Sunday, 13 February 2011

Interfacing (RAM) Onboard M4K memory blocks of Cyclone II Altera De1 board

This code shows how to store or interface the SRAM with any of your code. You can integrate this code in your projects for storing data. I will upload the interface of RAM with RTC code I designed for storing Date.

In this code I used the on-board M4K memory blocks on Altera DE1 board as RAM in 32 words i.e. 32 address locations of 4-bit. The RAM is initialized through Altera's MegaFunction IP Library. Comment if you don't know how to initialize RAM on any Altera board. I stored some variables like 2,4,6,8 on some starting locations to check if its working. I also added feature of manual address incrementation and data i/p.

For manual data entry you have to use four switches on Altera De1 board viz.
  • SW0 --LSB
  • SW1
  • SW2
  • SW3 --MSB
To write data press KEY3 and to increment address location press KEY0.

Read operation will be done Automatically, as I have interfaced the BCD to 7SEG (modified seg7.vhd in my previous posts) decoder directly to data out of RAM. You will get to see the stored digit on 7Seg display no.1.

You can directly interface the write enable, I/P and O/P of data and address in your code with only some minor changes.

If you have any qurries feel free to Comment directly on post instead of mailing me so other people will also get some help from it. You still can mail me your querries and Ideas at prasadp4009@gmail.com.

Download liks:
  • Main Entity sram_test.vhd     : sram_test.vhd
  • Altera DE1 Quartus .sof file  : sram.sof
  • Megafunction file                  : srm.vhd
  • Seg7 modified                      : seg7.vhd

Video: